The invention relates to non-volatile memories, and more particularly to non-volatile memory cells having more than one bit.
Multi-bit memory cells are typically formed by having a nitride storage layer that is programmed with electrons near the source/drains (current electrodes) of a transistor. There are thus two storage regions in the nitride, one near each source/drain. These storage regions receive electrons typically by hot carrier injection (HCI). First one of the source/drains is operated as the drain and the other as the source. Current flowing generates sufficiently hot electrons near the drain so that electrons collect in the storage region in the nitride near the source/drain being operated as the drain. The other of the storage regions is programmed in similar fashion, operating it as the drain.
The state of each storage region can be read separately. One of the source/drains has a voltage applied thereto, which causes depletion of the channel near it, and thus masks the influence of the storage region near the source/drain region that is being operated as the drain. Thus, the logic state of the storage region near the drain is irrelevant because the channel that is influenced by that storage region is depleted anyway. Thus, influence of the state of the other storage region can be isolated from the influence of the storage region near the drain. The primary advantage of this two state cell is higher density.
Many problems have also arisen, however. Reliability has become a significant problem due to the difficulty in keeping the electrons from moving out of the nitride storage regions where they were originally injected. Another is that the depletion region can extend so far as to reduce the portion of the channel under the influence of the storage region to be read to too low of an amount to be able to be reliably read.
Accordingly, there is a need for a multi-bit memory cell having increased reliability.